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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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Clock Driver Quad D Type Flip Flop
MC74F803
CLOCK DRIVER QUAD D-TYPE FLIP-FLOP WITH MATCHED PROPAGATION DELAYS
With Matched Propagation Delays
The MC74F803 is a high-speed, low-power, quad D-type flip-flop featuring separate D-type inputs, and inverting outputs with closely matched propagation delays. With a buffered clock (CP) input that is common to all flip-flops, the F803 is useful in high-frequency systems as a clock driver, providing multiple outputs that are synchronous. Because of the matched propagation delays, the duty cycles of the output waveforms in a clock driver application are symmetrical within 1.0 to 1.5 nanoseconds.
* * * *
Edge-Triggered D-Type Inputs Buffered Positive Edge-Triggered Clock Matched Outputs for Synchronous Clock Driver Applications Outputs Guaranteed for Simultaneous Switching
14 1
J SUFFIX CERAMIC CASE 632-08
Pinout: 14-Lead Plastic (Top View)
VCC 14 NC 13 O3 12 D3 11 D2 10 O2 9 CP 8
14 1
N SUFFIX PLASTIC CASE 646-06
1 GND
2 NC
3 O0
4 D0
5 D1
6 O1
7 GND
14 1
D SUFFIX SOIC CASE 751A-03
GUARANTEED OPERATION RANGES
Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current -- High Output Current -- Low Min 4.5 0 -- -- Typ 5.0 25 -- -- Max 5.5 70 -20 24 Unit V C mA mA 8
LOGIC SYMBOL
4 D0 CP O0 O1 O2 O3 5 D1 10 D2 11 D3
LOGIC DIAGRAM
D0 CP CP D Q CP D Q CP D Q CP D Q D1 D2 D3 3 VCC = PIN 14 GND = PINS 1 AND 7 NC = PINS 2 AND 13 6 9 12
O0
O1
O2
O3
11/93
(c) Motorola, Inc. 1994
REV 3
MC74F803
FUNCTIONAL DESCRIPTION The F803 consists of four positive edge-triggered flip-flops with individual D-type inputs and inverting outputs. The buffered clock is common to all flip-flops and the following specifications allow for outputs switching simultaneously. The four flip-flops store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. The maximum frequency of the clock input is 70 megahertz, and the LOW-to-HIGH and HIGH-to-LOW propagation delays of the O1 output vary by, at most, 1 nanosecond. Therefore, the device is ideal for use as a divide-by-two driver for high-frequency clock signals that require symmetrical duty cycles. The difference between the LOW-to-HIGH and HIGH-to-LOW propagation delays for the O0, O2, and O3 outputs vary by at most 1.5 nanoseconds. These outputs are very useful as clock drivers for circuits with less stringent requirements. In addition, the output-to-output skew is a maximum of 1.5 nanoseconds. Finally, the IOH specification at 2.5 volts is guaranteed to be at least - 20 milliamps. If their inputs are identical, multiple outputs can be tied together and the IOH is commensurately increased.
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits Symbol VIH VIL VIK VOH VOL Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Min 2.0 -- -- 2.5 -- -- IIH IIL IOS Input HIGH Current Input LOW Current Output Short Circuit Current (Note 2) ICC Power Supply Current -- -- 70 mA VCC = MAX * Normal test conditions for this device are all four outputs switching simultaneously. Two outputs of the 74F803 can be tied together and the IOH doubles. 1. For conditions such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges. 2. Not more than one output should be shorted at a time, nor for more than 1 second. -- -- -60 Typ -- -- -- -- 0.35 -- -- -- -- Max -- 0.8 - 1.2 -- 0.5 20 100 -0.6 -150 mA mA Unit V V V V V A Test Conditions* Guaranteed Input HIGH Voltage Guaranteed Input LOW Voltage IIN = -18 mA IOH = -20 mA IOL = 24 mA VIN = 2.7 V VIN = 7.0 V VIN = 0.5 V VOUT = 0 V VCC = MIN VCC = 4.5 V VCC = MIN VCC = MAX VCC = MAX VCC = MAX VCC = MAX
AC CHARACTERISTICS (TA = 0 to 70C, VCC = 5.0 V 10%, see Note 1)
CL = 50 pF Symbol fmax tPLH tPHL tPv tps O1 tps O0, O2, O3 tos trise, tfall O1 trise, tfall O0, O2, O3 Maximum Clock Frequency Propagation Delay CP to On Propagation Delay CP to On Variation (see Note 3) Propagation Delay Skew |tPLH Actual - tPHL Actual| for O1 Only Propagation Delay Skew |tPLH Actual - tPHL Actual| for O0, O2, O3 Output to Output Skew (see Note 2) |tp On - tp Om| Rise/Fall Time for O1 (0.8 to 2.0 V) Rise/Fall Time for O0, O2, O3 (0.8 to 2.0 V) Parameter Min 70 3.0 -- -- -- -- -- -- Max -- 7.5 3.0 1.0 1.5 1.5 3.0 3.5 CL = 100 pF Min 50 3.0 -- -- -- -- -- -- Max -- 10 4.0 2.0 2.0 2.5 4.0 4.5 Unit MHz ns ns ns ns ns ns ns
1. The test conditions used are all four outputs switching simultaneously. The AC characteristics described above (except for O1) are also guaranteed when two outputs are tied together. 2. Where tp On and tp Om are the actual propagation delays (any combination of high or low) for two separate outputs from a given high transition of CP. 3. For a given set of conditions (i.e., capacitive load, temperature, VCC, and number of outputs switching simultaneously) the variation from device to device is guaranteed to be less than or equal to the maximum.
MOTOROLA 2
TIMING SOLUTIONS BR1333 -- REV 4
MC74F803
AC OPERATING REQUIREMENTS (TA = 0 to 70C, VCC = 5.0 V 10%)
CL = 50 pF Symbol ts(H) ts(L) tf th(H) th(L) Setup Time, HIGH or LOW Dn to CP tp + ts (see Note) Hold Time, HIGH or LOW Dn to CP Parameter Min 3.0 3.0 -- 2.0 2.0 Max -- -- 9.0 -- -- CL = 100 pF Min 4.0 4.0 -- 2.0 2.0 Max -- -- 12 -- -- Unit ns ns ns
tw(H) CP Pulse Width 7.0 -- 8.0 -- ns tw(L) HIGH or LOW 6.0 -- 8.0 -- The combination of the setup time (ts) requirement and maximum propagation delay (tp) are guaranteed to be within this limit for all conditions.
APPLICATION NOTE
The closely matched outputs of the MC74F803 provide an ideal interface for the clock input of Motorola's high-frequency microprocessors. 74F803 INTERFACE AS CLOCK TO MC68020 SYSTEM
MC68020/MC68030 E1 CLK
VCC 33CLK1 14 MC74F803 4 5 10 74F04 1 2 11 1 D0 D1 D2 D3 CP 8 33CLK CLK 66 MHz O0 O1 O2 O3 3 6 9 33CLK2 (40 mA OUTPUT DRIVE) 12 7 RT C2 MC68881/MC68882 CLK VCC RU
TIMING SOLUTIONS BR1333 -- REV 4
MOTOROLA 3
MC74F803
OUTLINE DIMENSIONS
J SUFFIX CERAMIC PACKAGE CASE 632-08
8
-A14
-B1 7
C
L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIM F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. 5. 632-01 THRU -07 OBSOLETE, NEW STANDARD 632-08. DIM A B C D F G J K L M N MILLIMETERS MIN MAX 19.05 19.94 7.11 6.23 5.08 3.94 0.50 0.39 1.65 1.40 2.54 BSC 0.38 0.21 4.31 3.18 7.62 BSC 15 0 1.01 0.51 INCHES MIN MAX 0.750 0.785 0.245 0.280 0.155 0.200 0.015 0.020 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 15 0 0.020 0.040
-TSEATING PLANE
K F G D 14 PL 0.25 (0.010)
M
N J 14 PL TA
S
M 0.25 (0.010)
M
TB
S
N SUFFIX PLASTIC PACKAGE CASE 646-06
14 8
B
1 7
NOTES: 1. LEADS WITHIN 0.13 mm (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION "L" TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION "B" DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. 5. 646-05 OBSOLETE, NEW STANDARD 646-06. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 10 0 BSC 0.39 1.01 INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0 10 0.015 0.039
A F C N H G D
SEATING PLANE
NOTE 4
L
J K M
D SUFFIX SOIC PACKAGE CASE 751A-02
-A14 8
-B1 7
P
7 PL
0.25 (0.010)
M
B
M
NOTES: 1. DIMENSIONS "A" AND "B" ARE DATUMS AND "T" IS A DATUM SURFACE. 2. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 3. CONTROLLING DIMENSION: MILLIMETER. 4. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 5. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 6. 751A-01 IS OBSOLETE, NEW STANDARD 751A-02. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.75 8.55 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7 0 6.20 5.80 0.50 0.25 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 7 0 0.229 0.244 0.010 0.019
G
C
SEATING PLANE
R X 45
D 14 PL 0.25 (0.010)
M
K TB
S
M
F
J
A
S
MOTOROLA 4
TIMING SOLUTIONS BR1333 -- REV 4
MC74F803
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141 Japan. ASIA-PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, ASIA-PACIFIC: Tai Po, N.T., Hong Kong.
TIMING SOLUTIONS BR1333 -- REV 4
CODELINE TO BE PLACED HERE
*MC74F803/D*
MC74F803/D MOTOROLA 5

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